Dynamic interconnection networks: the crossbar switch

This paper describes various aspects and implementaions of the crossbar interconnect. The performance of a multiprocessor system depends on having an efficient bus architecture. In System-on-a-Chip (SoC) there are different architecture types such as single stage networks, multi-stage networks, omega networks and crossbar networks. This paper focuses on the latter, the crossbar network. Most modern architectures adopted the crossbar switch for interconnecting microprocessors and resources such as memory. The use of the crossbar switch in these modern architectures will be evaluated. Furthermore, there is a discussion on the different techniques used to increase the performance of the crossbar switch. Performance is measure in terms of how efficiently the crossbar can send data between input and output.